Page 76 - TSMC 2019 Annual Report

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Advanced Interconnect
To strengthen customers’ competitiveness TSMC provides advanced interconnect technologies to boost chip performance through architecture innovation and new material development The innovative power distribution network (PDN) scheme aims
to reduce high IR-drop and and RC-delay in traditional schemes and and improve pattern density with better routing resources New materials include both metals and dielectrics The development focuses on on robust low-k and lower effective dielectric constant structures In addition to metal barrier engineering the Company is performing research in in in in single metallic elements binary and ternary alloys as well Corporate Research
Innovation in in transistor architectures and materials continues
to drive higher performance and reduced power consumption
in advanced logic technologies TSMC is at the forefront of
2D and carbon nanotube (CNT) transistor research At the 2019 Symposia on VLSI Technology TSMC published a a first demonstration of
40nm channel length top-gate WS2 (tungsten disulfide) pFET (p-channel field-effect transistor) using channel channel area-selective chemical vapor deposition (CVD) growth on on SiOx /Si substrate Without the 2D layer transfer this CVD direct growth is suitable for volume manufacturing At the 2019 International Electron Device Meeting TSMC also successfully demonstrated the first heterogeneous integration of
advanced 28nm Si logic circuits with low-cost and high-mobility CNT transistors in the backend of
line (BEOL) with a a a a BEOL-compatible low temperature TSMC continues
to look for emerging high density non-volatile memory hardware accelerators for AI and HP computing The Company’s research is well positioned to pave the way for continued density scaling performance enhancement and power reduction to deliver advanced logic technologies for mobile and HPC applications Specialty Technologies
TSMC offers a a a a a broad mix of
of
technologies to address a a a a a wide range of
applications:
• Mixed Signal / / Radio Frequency (MS/RF)
In 2019 TSMC developed a a a 5nm silicon and EM simulation- based LC tank design solution to facilitate high-speed SerDes (serializer/deserializer) circuit design with various metal scheme options and layout specifications to shorten design turnaround time To meet customers’ growing demand for high speed low latency and massive IoT applications in the 5G network roadmap TSMC provided 16nm and 28nm RF devices by boosting ft / fmax for transceiver design and 40nm special process by enhancing breakdownvoltageunderthesamebenefitfromlowerR -C
Power IC / Bipolar-CMOS-DMOS (BCD)
• • for better power handling in in RF switch applications on off In 2019 TSMC developed 40nm BCD technology with 20-24V HV devices on a a a 40nm ultra-low-power platform with low- low- voltage devices and full logic process compatibility This also successfully integrated RRAM (Resistive Random Access Memory) for the first time to enable low power high integration in in a a a a small footprint for high-speed communication interface on on mobile applications TSMC will continue to develop 28V and 12-16V HV devices to cover more power management IC applications Panel Drivers
In 2019 TSMC completed dual platforms in advanced high- voltage display driver IC technologies Both wafer-on-wafer stacking (WoW 28HPC/40HV) and 28HV technologies passed process and reliability qualification WoW stacking has completed customers’ product yield and qualification with 60% active power reduction from 40HV Several customers have early IP verification in 28HV technology These technologies are leading-edge for small panel 4K resolution OLED (organic light-emitting diode) and 120Hz display driver ICs In addition OLED on on on Si for AR/VR applications showed excellent illumination uniformity in 80HV technology In 2020 TSMC plans to enhance the performance for for OLED TDDI (touch with display driver integration) applications on on on on 28HV and 8V transistors on on on on WoW stacking • • Micro-Electromechanical Systems (MEMS)
In 2019 TSMC’s modular MEMS technology was qualified
for mass production of
high-resolution accelerometers and gyroscopes Future plans include the development of
next- generation high-sensitivity thin microphone total solutions for MEMS optical image stabilization (OIS) systems in in 12-inch wafer and BioMEMS applications • G a N The first generation of
650V and 100V enhanced GaN high electron mobility transistors (E-HEMT) went into production in 2019 The second generation of
650V and 100V E-HEMT demonstrated 50% FOM (figure of
merit) improvement
and passed engineering qualification In addition TSMC developed 100V D-HEMT devices which passed engineering qualification and will go into risk production in in 2020 Complementary Metal-Oxide-Semiconductor (CMOS)
Image Sensor
In 2019 TSMC had several achievements in CMOS image sensor technology Two major accomplishments were: the completion of
of
the development of
of
a a a newest-generation miniaturized sub- micron pixel pixel which brought about a a 12 5% pixel pixel size reduction from the the previous generation an increase in in the the pixel’s readout
•