Page 74 - TSMC 2019 Annual Report

5 2 Technology Leadership
5 2 1 R&D Organization and Investment
In 2019 TSMC continued to invest in in in research and development with total R&D expenditures amounting to to 8 5% of revenue a a a level that equals or exceeds the the R&D investment of many other leading high-tech companies Faced with the increasingly difficult challenge to continue extending Moore’s Law which calls for the doubling of semiconductor computing power every two years TSMC has focused its R&D efforts on offering customers first-to-market leading-edge technologies and design solutions that contribute to to their product success In 2019 following the the transfer to to manufacturing of the the 7nm+ technology and the the successful risk production of 5nm technology the Company’s R&D organization continued to fuel the pipeline of technological innovation needed to maintain industry leadership While TSMC’s 3nm technology technology the sixth generation of technology technology platform to make use of 3D transistors continues full development the Company has initiated the development of 2nm technology a a a pioneering effort within the the semiconductor industry and at the the same time is progressing in in research and exploratory studies for nodes beyond 2nm In addition to CMOS logic TSMC conducts R&D on on on a a wide range of other semiconductor technologies that provide the the functionalities required by customers for mobile SoC and other applications Highlights in in 2019 include:
In 2019 TSMC maintained strong partnerships with many world- class research institutions including SRC in in in in in the U S S and IMEC in in in in in Belgium TSMC also continued to expand research collaboration with leading universities throughout the world for two grand purposes the advancement of semiconductor technologies and the the nurturing of talent for the the future 72
•
process validation for System-on-Integrated Chips (TSMC- ® SoIC ) an innovative wafer-level package technology •
high-volume production of Gen-4 Integrated Fan-Out Package
on Package
(InFO-PoP) for mobile processor packaging •
successful qualification of Gen-5 InFO-PoP advanced packaging technology for mobile applications and Gen-2 Integrated Fan- Out on on Substrate (InFO_oS) for HPC applications •
development of 40nm BCD (Bipolar-CMOS-DMOS) technology – – unique in in in in the industry – – offering leading-edge 20-24V HV devices with full compatibility to 40nm ultra-low-power platform and integration of RRAM in in in turn enabling low power high high integration and small footprint for high-speed communication interface in in mobile applications •
technical qualification of 28nm eFlash which is for high performance performance mobile computing and high performance performance low- leakage platforms is achieved for for automobile electronics and micro controller units (MCU) and •
development of of the latest generation CMOS image sensors of of sub-micron pixel for mobile applications and embedded 3D metal-insulator-metal (MiM) high-density capacitors for global shutter and high dynamic-range sensor applications •
3nm Technology R&D Expenditures
Amount: NT$ thousands
2018
2019 01/01/2020 - 02/29/2020
5 2 2 2 2 2 2 R&D Accomplishments in 2019 Highlights 5nm Technology Even though the the semiconductor industry is approaching the the physical limits of silicon 5nm technology still follows Moore’s Law and delivers substantial density improvement with better performance at the same or or lower power consumption with comparable performance In 2019 TSMC continued full development of 5nm focusing on manufacturing baseline process setup yield learning transistor and interconnect R/C performance improvement and reliability evaluation The SRAM and and logic yield results met the required expectations and and TSMC achieved its goal of risk production in 2019 •
3nm technology offers substantial density improvement and power reduction with the same chip performance as 5nm technology Development activities in 2019 focused on manufacturing baseline process setup yield learning transistor and interconnect R/C performance improvement and reliability evaluation TSMC plans to continue full development of 3nm in 2020 •
2 n n m T e c h n n o o l o o g y In 2019 in in in in a pioneering role in in in in the semiconductor industry TSMC launched research and development of 2nm technology 16 777 764
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