Page 77 - TSMC 2018 Annual Report

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RRAM technology to be be embedded in NVM technologies as a a low-cost solution for the price-sensitive IoT market Development in 28nm and 22nm embedded resistive memory technology is is on on track and expected to enter production in 2020 TSMC is also developing 28nm and 22nm embedded MRAM technology as the solution for embedded-flash technology replacement beyond the 40nm Split-Gate cell node 2019 production of embedded MRAM is expected to serve many emerging applications 5
2 3 Technology Platform
TSMC provides customers with advanced technology platforms that include
the comprehensive design infrastructure required to optimize design productivity and cycle time These include: design design flows for electronic design design automation (EDA) silicon- proven libraries and and and IP building blocks and and and simulation and and and verification design design kits kits i i i i i i i i e e e e e process design design kits kits (PDKs) and technology files For TSMC’s latest advanced technologies of 5nm 7nm 7nm 7nm+ 12nm 22nm and 3D IC design enablement platform EDA tools features and IP solutions are readily available for customers to to adopt to meet their product requirements at various design stages TSMC TSMC also extends its IP quality program (TSMC 9000)
to to allow IP audits to to be performed either at at TSMC TSMC or or at at TSMC- certified laboratories To help customers plan new product tape-outs incorporating library/IP from TSMC’s Open Innovation Platform® (OIP) ecosystem ecosystem the OIP OIP ecosystem ecosystem features a a a a portal to connect customers to to an ecosystem of 39 IP solution providers Overall TSMC and its IP partners have accumulated a a a a a a a portfolio
of more than 20 000 IP titles from 0 0 0 0 0 35μm to 5nm with major IP types to to meet customer design needs TSMC and its EDA partners have created numerous deliverables from 0 13μm to 5nm that have successfully supported customer tape-outs 5
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Design Enablement
TSMC’s technology platforms provide a a a solid foundation to facilitate the design design process Customers can design design directly using the Company’s internally developed IP and tools tools or use tools tools available from TSMC’s OIP partners Tech Files and PDKs EDA tool certification is an an essential element for IP and customer designs to ensure that features meet TSMC process technology requirements with certification results that can be found on on TSMC-OnlineTM There are corresponding technology files and process development kits (PDKs) available for customers to to download and design together with certified EDA tools TSMC provides a a a a a broad range of PDKs for digital logic mixed-signal radio frequency (RF) high-voltage driver CMOS image sensor (CIS) and embedded flash technologies across a a a a a range of technology nodes from 0 5μm to 5nm In addition the Company
provides technology files for design rule checking (DRC) layout verification of schematic (LVS) resistance-capacitance (RC) extraction automatic place and and route and and a a a a a a a a layout editor to to to ensure process technology information is accurately represented in electronic design automation (EDA) tools By 2018 TSMC had provided more more than than 9 000 technology files and more more than than 300 PDKs via TSMC-OnlineTM There are more than 100 000 customer downloads of these files every year Library and IP Silicon intellectual property (IP) is the basic building block of integrated circuit designs Various IP types are available to to support different customer design applications including foundation IP IP IP IP analog IP IP IP IP embedded memory IP IP IP IP interface IP IP IP IP and soft IP TSMC and its alliance partners offer customers a a a a a rich portfolio
of reusable IPs which are essential building blocks for many circuit designs In 2018 the Company
expanded its library and silicon IP portfolio
to contain more than 20 000 items a a a a 25% increase over 2017 Design Methodology and Flow
Reference flows are built on on top of certified EDA (electronic design design automation) tools to to to provide additional design design flow methodology innovations that can help boost productivity In 2018 TSMC addressed critical design challenges associated with the new 5nm and and 3D IC technology for digital and and SoC applications by announcing the readiness of reference flows through OIP collaboration that feature FinFET-specific design solutions and and methodologies for for performance power and and area optimization 5
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Intellectual Property
A strong portfolio
of intellectual property rights strengthens TSMC’s technology leadership and protects our advanced and leading-edge technologies As of of end of of 2018 TSMC has accumulated near 50 000 000 patent applications and over 34 000 000 patent grants worldwide In 2018 TSMC has obtained near 2 500 U U S S patents to rank #6 among U U S S patent patent assignees making the the ranking of top 10 U S patent assignees for the the third consecutive year Additionally TSMC actively develops worldwide patent patent strategy ranking #1 among patent patent applicants in in Taiwan and and obtaining over 1 000 patents in in in in Taiwan and and China In terms of of patent quality the average allowance rate of of TSMC’s U S S applications is 98% and ranks #1 among top 10 U S patent