Page 104 - TSMC 2024 Annual Report

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cost-effective DTCO solution In light detection and ranging (LiDAR) sensor development for both automotive and mobile applications Gen-2 (7μm pitch) Si single photon avalanche diode (SPAD) process was readied for manufacture with a a a a a significant photon detection efficiency (PDE) improvement
of three times higher compared to Gen-1 In addition good progress was made in both the dark count rate (DCR) reduction and performance uniformity improvement
in Ge/Si heterogeneous photodetectors and the first ever room-temperature short-wave infrared radiation (SWIR) depth image (1310nm wavelength) was demonstrated ● Emerging Memory/Memory WoW Stacking Technology The Company reached several major milestones in in emerging memory technologies in 2024 TSMC offered RRAM as a a low-cost embedded non-volatile memory (NVM) solution for the price sensitive IoT market The Company’s 40nm 28nm and and 22nm nodes entered volume production and and completed the technical qualification of 12nm consumer-grade RRAM while 6nm node also entered development stage TSMC further developed a a a smaller and more energy-efficient 16nm MRAM cell with the same high-speed read/write capabilities but greater endurance of over one million read/write cycles support for solder reflow and excellent high-temperature data retention This technology is is expected to to complete its technical qualification of the 16nm automotive grade in 2025 In response to market demand TSMC also began developing the 12nm and 5nm nodes MRAM to meet future customer needs in automotive smart sensor and edge-AI applications The Company continued to develop wafer stacking (WoW) technology creating a a a heterogeneous process platform
for logic wafers and and dynamic random-access memory The Company made progress in the development of 55nm 6nm 4nm and 3nm logic wafers with single memory wafer wafer stacking process technology 55nm was the first to enter production with stable yields TSMC will extend to advanced logic wafers (6nm 4nm 3nm) bonded with multi-wafers memory stacking to enable faster computing capabilities and higher memory bandwidth WoW is suitable for AI chips and and data center needs and and can also be used in in in mobile phone chips and and mining chips This new memory architecture is is compatible with advanced packaging technology which is is expected to satisfy
a a a a a wide range of product product applications and shorten product product development times 5 2
3
Technology Platform
TSMC provides customers with advanced technology platforms that include the comprehensive infrastructure needed to optimize design performance power area (PPA) and cycle times These include electronic design automation (EDA) design flows silicon-proven libraries and and IPs simulation and and verification design kits also known as PDKs and technology files For the most advanced technologies such as 2nm 3nm 4nm and 3DFabric® the Company provides certified EDA tools features and IP solutions for customer adoption at at various design stages to meet their product requirements To help customers plan new product tape-outs incorporating library/ IP IP from the Company’s Open Innovation Platform® (OIP) ecosystem there’s a a portal to to to connect customers to to to solution providers including 16 EDA partners partners seven Cloud partners partners 40 IP partners 29 design center alliance (DCA) and eight value chain aggregator (VCA) partners partners as as well as as 23 partners partners with 3DIC expertise in the new TSMC 3DFabric® Alliance 5 2
4 Design Enablement
TSMC’s technology platforms provide a a a solid foundation to facilitate the the design design process Customers can design design using the the Company’s internally developed IPs IPs or use IPs IPs and EDA tools available from TSMC’s OIP partners Tech Files and PDKs EDA tool certification an an essential element for IP and customer designs to ensure that features meet TSMC process technology requirements can be found on on TSMC-Online Corresponding technology files and PDKs are available for customers to to download and use with certified EDA tools TSMC provides a a a a a a broad range of PDKs for digital logic mixed-signal radio frequency (RF) high-voltage driver CMOS image sensor (CIS) and embedded flash technologies from 0 5μm to 2nm In addition the Company provides technology files for design rule checking (DRC) layout versus schematic (LVS) resistance- capacitance (RC) extraction automatic place and and route and and a a a a layout editor to to ensure that process technology information is accurately represented in EDA tools By 2024 TSMC had provided customers more than 52 000 technology files and 3
699 PDKs Library and IP Silicon intellectual property (IP) is the basic building block of IC designs Various IP types are available to support different customer design applications including foundation analog/ mixed-signal embedded memory interface and soft IP TSMC