Page 14 - 2017 TSMC Annual Report

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Specialty Technology
● 16FF+ technology began production for customer applications in in in the automotive industry in in in 2017 16FFC Foundation IPs (intellectual properties) passed the Automotive Electronic Council AEC-Q100 Grade-1 qualification and were certified for functional safety standard ISO 26262 ASIL-B In addition TSMC 9000A was introduced for automotive IP management to to complete the automotive ecosystem with third-party IP vendors ● 16FFC RF technology was extended to next generation Wireless Local Area Network (WLAN 802 11ax) and Millimeter Wave (mmWAVE) applications in addition to wireless connectivity applications such as smartphone the 5th generation mobile network (5G) ● 22nm RF RF (22ULP RF) technology supports high Ft devices and more flexible process design kits (PDK) while providing reliable simulation models for chip development and production for 5G mobile and wireless communication systems mmWave RF TRx and IoT applications ● 28nm RF RF RF (28HPC RF RF RF and 28HPC+ RF) technologies offer >300 Gigahertz (GHz) high-frequency devices and support wireless components in smartphone automotive and IoT applications ● 40nm ULP embedded flash which began volume
production in 2016 for applications such as wireless MCU (Microcontroller Unit) IoT devices devices wearable devices devices and high-performance MCU is expected to to complete Automotive Electronic Council AEC-Q100 qualification in 2018 ● 40nm ULP embedded Resistive Random Access Memory (RRAM) completed technology development and was ready for risk production by the end of 2017 Applications include wireless MCU IoT and wearable devices ● 0 13μm SPAD (Single-Photon Avalanche Diode) technology platform speeds up customer product development of LiDAR (Light Detection and Ranging) applications 3D (Three Dimensional) imaging and sensing are becoming more important for machine vision and LiDAR is is a a a a a critical technology to to serve these applications Customers can use TSMC’s industry-leading SPAD SPAD platform to design SPAD SPAD sensors and achieve the best time-to-market which will greatly accelerate LiDAR’s use in automotive and security industries ● 12-inch 0 13μm BCD (Bipolar-CMOS-DMOS) Plus technology which provides superior cost competitiveness compared to the prior 0 13μm BCD technology passed process validation by customers and started production in the second half of 2017 ● 0 18μm BCD third generation which provides superior cost competitiveness compared to the second generation also passed process validation by customers and started volume
production in the second half of 2017 ● In addition to TSMC’s popular capacitive fingerprint sensor technology technology the Company expanded its technology technology offering for optical fingerprint sensing from 0 0 18μm and 0 0 11μm CMOS image sensors (CIS) to to to collimator enabling customers to to customize their optical fingerprint sensors Fingerprint sensing is a a a a a critical authentication scheme for many electronic communications and payment systems ● A Piezo technology pilot line was set up in in 2017 to help customers design and develop new products for micro speakers microphones ultrasonic sensors and various types of actuators serving medical and health applications Piezo technology is a a a a a new area in MEMS (Micro-electromechanical Systems) with high potential New types of piezoelectric thin film materials have been pre-characterized so that customers can focus on product design and architecture to achieve best time-to-market Advanced Packaging Technology
● For advanced mobile device applications TSMC began volume
production of of the second generation of of InFO-PoP (Integrated Fan-Out Package Package on Package) technology that integrates 10nm SoC and DRAM for advanced mobile products in the second quarter of 2017 ● For high performance computing applications TSMC began production of CoWoS® (Chip on on on Wafer on on on Substrate) technology featuring heterogeneously integrating 12nm SoC plus four stacks of 8-hi (8 high) second generation high bandwidth memory (HBM2) on an an about 1500mm2 interposer in in the first half of 2017 Also TSMC successfully developed a a a a CoWoS® module that integrates a a a a 16nm SoC and more than four 8-hi HBM2 stacks in 2017 ● In In In addition to CoWoS® InFO_oS (Integrated Fan-Out on on Substrate) technology integrating multiple SoC chips is expected to complete qualification in 2018 ● Continued volume
production of fine pitch Cu bump for flip chip packaging on on on ≥10nm silicon in in 2017 In addition Cu bump on on on 7nm silicon was qualified for production in 2018 TSMC also continued volume
production on on on on ≥28nm silicon in in WLCSP (Wafer Level Chip Scale Packaging) technologies for high-end smartphone applications in 2017 and completed 16nm WLCSP qualification for 2018 production