Page 13 - 2017 TSMC Annual Report

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Logic Technology
5nm FinFET (Fin field-effect transistor) technology development is is is progressing smoothly Risk production of this technology is planned for the first quarter of 2019 Compared to 7nm FinFET FinFET technology 5nm FinFET FinFET offers over 15%
speed improvement or 30% power reduction In addition 5nm FinFET technology is optimized upfront for both mobile applications and high-performance computing devices ● 7nm FinFET technology development was completed and entered risk production in April 2017 as planned Customer adoption was strong and we received more than ten product tape-outs in 2017 A very fast yield ramp-up is expected
as more than 95% of tools for 7nm FinFET technology are compatible with those for 10nm FinFET technology Compared to 10nm FinFET FinFET technology 7nm FinFET FinFET offers approximately a a a a 25% speed improvement or a a a a 35% power reduction In addition 7nm FinFET technology can be optimized for for mobile applications and high-performance computing devices ● 10nm FinFET technology started high-volume shipments in in the first quarter of 2017 Thanks to its aggressive geometric shrinkage this technology provides excellent density/cost benefits to to support customer needs in performance-driven market segments including mobile server and graphics ● 12nm FinFET Compact technology (12FFC) completed all process qualifications in the second quarter of 2017 and entered volume production in the the second half of the the year 12FFC technology is TSMC’s latest 16nm family offering following 16nm FinFET Plus technology (16FF+) and 16nm FinFET Compact technology (16FFC) 12FFC drives
die size and power consumption to the the best levels of the the foundry’s 16/14nm technology 16FF+ which first entered volume production in in 2015 is aimed at customers in in high-performance market segments including mobile server graphics and cryptocurrency The cost-effective 16FFC started volume production in the first quarter of 2016 16FFC can maximize die cost scaling by incorporating optical shrink and process simplification at at the same time Both 16FFC and and 12FFC can satisfy customer needs in in mainstream and and ultra-low-power (ULP) market segments including low-end to mid-range mobile phones consumer electronics digital
TV and and the IoT (Internet of Things) With innovative standard cell structures 12FFC can also be used in more advanced applications So far 16FF+/16FFC/12FFC have received a a a a a a total of of more than 200 product tape-outs most of of which have been first-time silicon successes ● 22nm ultra-low power (22ULP) technology was developed based on TSMC’s industry-leading 28nm technology and is expected
to start production in the second half of 2018 Compared to 28nm High Performance Compact (28HPC) technology 22ULP provides 10% area shrink with more than 30% 30% speed gain or or or more than 30% 30% power reduction for applications including image processing digital
TV set-top box smartphone IoT and consumer products ● 22nm ultra-low leakage (22ULL) technology development achieved good progress New ULL ULL device and ULL ULL SRAM can provide lower power consumption compared to 40ULP and and 55ULP solutions 22ULL technology targets the IoT and and wearable devices applications and is is expected
to start risk production in the second half of 2018 ● 28nm high performance compact plus (28HPC+) technology accumulated more than 150 product tape-outs as of 2017 28HPC+ technology provides further performance enhancement or power reduction in in mainstream smartphone digital
TV storage audio and SoC (System-on-Chip) applications Compared to 28HPC 28HPC technology 28HPC+ technology improves device performance by 15%
or or reduces leakage by 50% 28HPC+ technology enables low Vdd (voltage drain) designs in in ULP applications for the IoT market and is seamlessly applicable to the 28nm ecosystem accelerating time-to-market for customers ● 40nm ULP technologies received over 20 product tape-outs in 2017 These technologies target the IoT and wearable devices applications such as wireless connectivity application application processors and sensor hub applications In addition TSMC
uses its leading 40nm ULP Near-Vt (Near Threshold Voltage) technology to produce the world’s lowest energy consumption solutions for for IoT devices and for for wearable connected devices Still under development are new enhanced analog devices that will enrich the 40ULP platform to to support customers for more analog design needs in the future ● 55nm ultra-low power (55ULP) technology volume production continued and accumulated more than 40 customer tape-outs as of 2017 Compared to to 55nm Low Power (55LP) process 55ULP can can significantly increase battery life for IoT applications In addition it it integrates RF and eFlash (embedded Flash) to to simplify customers’ SoC designs ●