Page 99 - TSMC 2024 Annual Report

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● ● ● ● ● ● ● ● ● ● automotive customers to to to design with the most advanced 3nm technology technology for automotive applications N3A technology technology is expected to to complete automotive grade qualification automotive design enablement platform (ADEP) development and the the release of of V1 0 0 PDK by the the end of of 2025 N4C N4C radio frequency (N4C RF) technology the next generation of N4P RF technology is on on track in development in in 2024 and is expected to be launched in in 2025 5nm FinFET Automotive (N5A) technology received multiple customer product product tape-outs since 2023 These products were successfully prototyped qualified for automotive applications and are expected to enter volume production utilizing TSMC’s automotive service package (ASP) in 2025 Second-generation N6 N6 RF RF (N6 RF+) technology development was was completed and its V1 1 1 PDK was was finalized in in 2024 12FFC+ RF technology process enhancements offer an an advanced RF fT/fMAX corner model and feature the ultra-thicker metal metal with aggressive metal metal width push The technology continues volume production for customers’ 4G and and 5G cellular RF and and IoT wireless connectivity products since 2023 16FFC 16FFC FinFET Compact (16FFC) RF Enhancement III technology with continuous improvement of 16FFC RF technology is expected to be launched in the second half
of 2025 16FFC RF technology has received many customer tape-outs since 2021 The development of its enhanced version (Enhancement I/II) was completed in 2022 to support applications such as 28/39/47GHz mmWave RF front-end module and 77GHz/79GHz automotive radar N12e® RRAM RRAM TSMC’s third-generation RRAM RRAM solution features balanced cost and reliability This technology entered risk production for consumer grade in 2024 28ULL resistive random-access memory (RRAM) technology TSMC’s second-generation RRAM technology passed Automotive Grade-1 technology qualification in 2024 28nm high voltage (HV) technology began volume production for smartphone organic light-emitting diode (OLED) display applications in 2024 40nm silicon on on on insulator (N40SOI) technology on on on 12-inch wafers which provides industry-leading competitive advantages entered its third year of volume production in 2024 80nm technology for micro-OLED-on-Silicon display backplanes in augmented reality reality (AR)/virtual reality reality (VR) devices entered volume production in 2024 This technology offers extremely high density with over 3 000 pixels per inch (ppi) enhancing vision quality for near-eye applications ● Advanced 40nm Bipolar-CMOS-DMOS (BCD) technology PDK was ready in 2024 ● Competitive 90nm BCD technology received multiple tape-outs and started volume production in 2024 This technology is positioned as the next platform for for 0 18μm BCD technology for high digital content products such as charger and audio amplifier ICs Additionally the new continuous improvement plan (CIP) is underway targeting server applications and its PDK is scheduled to be ready by 2026 ● 0 13μm BCD technology will continue to be optimized for the digital consumer electronics (DCE) and automotive markets Its latest PDK will be released in 2025 ● The switch device of the second-generation 6-inch gallium nitride (GaN) on on silicon technology was qualified in 2024 This technology will support both DCE and automotive electronics applications In addition the 8-inch GaN on on on on on silicon technology development is on track ● CMOS image sensor (CIS) technology was enhanced and progressed to the the the next generation further strengthening
the capabilities of advanced CISs In 2024 TSMC helped customers roll out advanced high dynamic range products to to the market ● For silicon photonics technology the Company continued development work on on an innovative 3D photonics stacking technology – compact universal photonics engine (COUPE) which can integrate silicon photonics chip and electrical control chip chip into a single-chip photonic engine This photonics engine can be co-packaged with HPC chip to to provide low-power and high-speed data transmission The data rate of the test vehicles using TSMC’s COUPE technology achieved its targeted goal in in 2024 TSMC also continued working on on co-packaged optics (CPO) solutions to reduce data data transmission power consumption in data data centers TSMC TSMC 3DFabric® – TSMC TSMC Advanced 3D 3D Silicon Stacking and Packaging Technologies
● ● ● TSMC-SoIC® Chip on on Wafer N5 system on on integrated chip (SoIC) stacking technology entered its second year of volume production for HPC products in in 2024 and N3 SoIC stacking technology volume production is expected in 2025 TSMC-COUPETM technology service which integrates silicon photonics and electrical control chips using TSMC-SoIC® Chip on on Wafer stacking process is on on track in in development for high-speed data transmission products Chip on on Wafer on on Substrate (CoWoS®) technology service integrates multiple system-on-chip (SoC) chips and the high bandwidth memory stacks on the interposer wafer to enable HPC products with more compute power and