GIGAFAB™ Facilities
TSMC’s 12-inch fabs are a key part of its manufacturing strategy. TSMC currently operates three 12-inch GIGAFAB™ facilities – Fab 12, Fab 14, and Fab 15 – the combined capacity of which reached 4,619,000 12-inch wafers in 2013. Production within these three facilities supports 0.13μm, 90nm, 65nm, 40nm, 28nm, and 20nm process technologies, and their sub-nodes. Part of the capacity is reserved for research and development work and currently supports 16nm, 10nm and beyond technology development. TSMC has developed a centralized fab manufacturing management for the customers’ benefit of consistent quality and reliability performance, greater flexibility of demand fluctuations, faster yield learning and time-to-volume, and minimized costly product re-qualification. It enabled Fab 15 to fast ramp 28nm capacity from 50,000 to around 100,000 wafers output per month in 2013 to satisfy customers’ demand.
Engineering Performance Optimization
Highly sophisticated information technology (IT) solutions, such as advanced equipment control, fault detection and diagnosis, engineering big data mining, and centralized operation platforms, are implemented to optimize TSMC equipment, process and yield performance. They also improve production efficiency, effectiveness, and engineering capability via information integration, workflow optimization and automation.
Advanced analytical methods identify critical equipment and process parameters that are linked to device performance. Methodologies such as virtual metrology, yield dissection and management integrate Advanced Process Control (APC), Fault Detection Classification (FDC), Statistical Process Control (SPC), and Circuit Probe data in order to optimize equipment performance to match device performance.
Accurate modeling and control at each process stage drives intelligent module loop control. The process control hierarchy dispatched via sophisticated computer-integrated manufacturing systems enables optimization from equipment to end product, which achieves precision and lean operation in a high product mix semiconductor manufacturing environment.
Precision and Lean Operations
TSMC’s unique manufacturing infrastructure is tailored for a high product mix foundry environment. Following its commitment to manufacturing excellence, TSMC has equipped a sophisticated scheduling and dispatching system, implemented industry-leading automated materials handling systems, and employed Lean Manufacturing approaches to provide customers with on-time-delivery and best-in-class cycle time. Real-time equipment performance and productivity monitoring, analysis, diagnosis and control minimize production interruption and maximize cost effectiveness.
450mm Wafer Manufacturing Transition
TSMC joined the Global 450mm Consortium (G450C) located in the College of Nanoscale Science and Engineering (CNSE) of New York University at Albany, New York. The consortium includes five IC makers and CNSE (which represents New York State and provides the clean room facility), as well as key 450mm tool suppliers as associate members.
Currently, TSMC has 16 experienced employees working in the consortium. TSMC has assumed the Operation General Manager position in the consortium and commits to lead the industry for a cost-effective 450mm transition. The clean room of G450C in Albany has been ready for tool installation since the first quarter of 2013. Most of the tools will be installed by 2015.
Besides 450mm tool readiness, TSMC is also developing novel 450mm operations to bring the maximum value of semiconductor wafer fabrication to customers, including advanced quality and the most competitive cycle time in advanced technology. 450mm will be a new era of semiconductor manufacturing with new manufacturing capability advanced from today’s leading edge technology.
Raw Materials and Supply Chain Risk Management
In 2013, TSMC continued Supply Chain Risk Management review meetings periodically with business teams to proactively identify and manage risk of supply capacity insufficiency and supply chain interruption. TSMC also worked with its suppliers to enhance the performance of quality, delivery, risk management, and to support green procurement, environmental protection and safety.
Raw Materials Supply
| Major Materials | Major Suppliers |
Market Status |
Procurement Strategy |
|---|---|---|---|
Raw Wafers |
F.S.T. |
These five suppliers together provide over 90% of the world’s wafer supply. Each supplier has multiple manufacturing sites in order to meet customer demand, including plants in North America, Asia, and Europe. |
|
Chemicals |
Air Products |
These seven companies are the major suppliers for bulk and specialty chemicals. |
|
Litho Materials |
AZ |
These seven companies are the major suppliers for worldwide litho materials. |
|
Gases |
Air Liquide |
These four companies are the major suppliers of specialty gases. |
|
Slurry, Pad, Disk |
Air Products |
These nine companies are the major suppliers for CMP materials. |
|
Suppliers Accounted for at Least 10% of Annual Consolidated Net Procurement
Unit: NT$ thousands
| Supplier | 2013 |
2012 |
||||
|---|---|---|---|---|---|---|
Procurement |
As % of 2013 |
Relation to TSMC |
Procurement |
As % of 2012 |
Relation to TSMC |
|
VIS |
6,993,964 |
17% |
Investee accounted for |
4,475,674 |
11% |
Investee accounted for |
Company A |
4,925,966 |
12% |
None |
6,708,942 |
16% |
None |
Company B |
4,812,417 |
11% |
None |
5,846,449 |
14% |
None |
Company C |
4,401,215 |
11% |
None |
3,954,602 |
9% |
None |
Others |
20,773,685 |
49% |
|
20,394,725 |
50% |
|
Total Net Procurement |
41,907,247 |
100% |
|
41,380,392 |
100% |
|
Quality and Reliability
A characteristic of TSMC’s industry reputation is its commitment to providing customers with the best quality wafers and service for their products. Quality and Reliability (Q&R) services aim to achieve “quality on demand“ to fulfill customers’ needs regarding time-to-market, reliable quality, and market competition over a broad range of products.
Q&R technical services assist customers in the technology development and product design stage to design-in their product reliability requirements. Since 2008, Q&R has worked with R&D to successfully establish and implement new qualification methodology for High-k/Metal Gate (HKMG) as well as for FinFET structures in 2013. Q&R had been collaborating with SEMI, the Semiconductor Equipment and Material International, to establish an IC Quality Committee since May 2012 in order to enhance product quality of the semiconductor supply chain. For backend technology development, Q&R worked with R&D and the Backend Technology and Service Division to complete the Cu Bump technology development and production transfer of both CuBoL (Copper Bump on Lead) and CuBoT (Copper Bump on Trace) as lead free bump solutions for fine bump pitch products. To extend product package reliability validation, Q&R established in-house system-level temperature cycling, bending, drop and vibration test capabilities in 2013.
In 2013, Q&R completed a new audit of incoming material suppliers for advanced technology. Q&R also implemented innovative statistical matching methodologies to achieve the goal of enlarging the manufacturing window with better quality control. The scope of the methodology includes facility, metrology and process tools, wafer acceptance test (WAT) data and reliability performance. Since 2011, Q&R tightened the post-fab outgoing visual inspection criteria for wafer quality improvement to AQL 0.4% from AQL 0.65%.
To sustain production quality, and to minimize risk to customers when deviations occur, manufacturing quality monitoring and event management span all critical stages – from raw material supply, mask making, and real-time in-process monitoring, to bumping, wafer sort and reliability performance. Advanced failure and materials analysis techniques are also developed and effectively deployed in process development, customer product development and product manufacturing. In recent years, due to continuous shrinking of device features, laboratory tools have been adapted to complement traditional metrology tools that have run into their physical limits. Furthermore, state-of-the-art materials analysis, chemical analysis and fault isolation equipment are continuously being added to support development activities of the 20nm, 16nm and 10nm technology nodes.
In compliance with the electronic industry’s lead-free and green IC package policy, Q&R qualified and released lead-free bumping to satisfy customer demands, and made lead-free bump package possible for 0.13µm, 45nm, 40nm, 28nm and 20-SoC technology products by collaborating with the major outsource assembly and testing subcontractors. This enabled TSMC customers to introduce and ramp lead-free products with excellent assembly quality. In 2013, TSMC Q&R ramped wafer-level Chip Scale Package (CSP) to 21K per month and lead-free to 60K per month without major quality issues. For mainstream technologies, Q&R qualified ultra, extreme low leakage and high endurance embedded Flash IP, IPD (Integrated Passive Device), hybrid of Copper, and Copper-Aluminum technology with customers. Q&R continues to build reliability testing and monitoring to ensure excellent manufacturing quality of specialty technologies on automotive, high-voltage products, CMOS image sensors and embedded-Flash memory products.
TSMC Q&R is also responsible for leading the Company towards the ultimate goal of zero-defect production through the use of continuous improvement programs. Periodic customer feedback indicates that products shipped from TSMC have consistently met or exceeded their field quality and reliability requirements. In 2013, a third-party audit verified the effectiveness of the TSMC quality management system in compliance with ISO/TS 16949:2009 and IECQ QC 080000:2012 certificates requirements.